EE3302 DIGITAL LOGIC CIRCUITS

UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES

Number system, error detection, corrections & codes conversions, Boolean algebra: De- Morgan’s theorem, switching functions and minimization using K-maps & Quine McCluskey method – Digital Logic Families -comparison of RTL, DTL, TTL, ECL and MOS families – operation, characteristics of digital logic family.

UNIT II COMBINATIONAL CIRCUITS

Combinational logic – representation of logic functions-SOP and POS forms, K-map representations – minimization using K maps – simplification and implementation of combinational logic – multiplexers and de multiplexers – code converters, adders, subtractors, Encoders and Decoders.

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS

Sequential logic- SR, JK, D and T flip flops – level triggering and edge triggering – counters – asynchronous and synchronous type – Modulo counters – Shift registers – design of synchronous sequential circuits – Moore and Mealy models- Counters, state diagram; state reduction; state assignment.

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS AND PROGRAMMABILITY LOGIC DEVICES

Asynchronous sequential logic Circuits-Transition stability, flow stability-race conditions, hazards &errors in digital circuits; analysis of asynchronous sequential logic circuits introduction to Programmability Logic Devices: PROM – PLA –PAL, CPLD-FPGA.

UNIT V V H DL

RTL Design – combinational logic – Sequential circuit – Operators – Introduction to Packages – Subprograms – Test bench. (Simulation /Tutorial Examples: adders, counters, flip flops, Multiplexers & De multiplexers).

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